Scilab Website | Contribute with GitLab | Mailing list archives | ATOMS toolboxes
Scilab Online Help
5.3.0 - Português

Change language to:
English - Français - 日本語 -

Please note that the recommended version of Scilab is 2025.0.0. This page might be outdated.
See the recommended documentation of this function

Manual Scilab >> xcos > palettes > Electrical palette > VVsourceAC

VVsourceAC

Variable AC voltage source

Block Screenshot

Description

The variable voltage source block is a model for a controlled AC voltage source. This component provides a sinusoid voltage across its ports. The amplitude of the output voltage is governed by the explicit input and the frequency is defined by the user. The ohmic resistance of the block is zero.

Dialog box

  • Frequency (Hz)

    Frequency of the output sinosoid voltage

    Properties : Type 'vec' of size -1.

Default properties

  • Inputs :

    • Modelica variable name : 'p'

      Implicit variable.

    • Modelica variable name : 'VA'

      Explicit variable.

  • Outputs :

    • Modelica variable name : 'n'

      Implicit variable.

  • Parameters :

    • Modelica parameter name : 'f'

      Default value : 50

      Is a state variable : no.

  • File name of the model : VVsourceAC

Interfacing function

  • SCI/modules/scicos_blocks/macros/Electrical/VVsourceAC.sci

Modelica model

  • SCI/modules/scicos_blocks/macros/Electrical/VVsourceAC.mo

<< Switch Electrical palette VariableResistor >>

Copyright (c) 2022-2024 (Dassault Systèmes)
Copyright (c) 2017-2022 (ESI Group)
Copyright (c) 2011-2017 (Scilab Enterprises)
Copyright (c) 1989-2012 (INRIA)
Copyright (c) 1989-2007 (ENPC)
with contributors
Last updated:
Wed Jan 26 16:24:42 CET 2011