Scilab Website | Contribute with GitLab | Mailing list archives | ATOMS toolboxes
Scilab Online Help
5.3.0 - 日本語

Change language to:
English - Français - Português

Please note that the recommended version of Scilab is 2025.0.0. This page might be outdated.
See the recommended documentation of this function

Scilab manual >> xcos > palettes > Integer palette > DLATCH

DLATCH

D latch flip-flop

Block Screenshot

Description

This block outputs the input state when the input gate is high. The input is D the enable is C. Q and !Q are the outputs of this block. This block is almost used with digital number, the input data type is int8.

The truth table of this block is

C D Q !Q
0 0 0 1
0 1 0 1
1 0 0 1
1 1 1 0

Default properties

  • always active: no

  • direct-feedthrough: yes

  • zero-crossing: no

  • mode: no

  • regular inputs:

    - port 1 : size [1,1] / type 5

    - port 2 : size [1,1] / type -1

  • regular outputs:

    - port 1 : size [1,1] / type 5

    - port 2 : size [1,1] / type 5

  • number/sizes of activation inputs: 0

  • number/sizes of activation outputs: 0

  • continuous-time state: no

  • discrete-time state: no

  • object discrete-time state: no

  • name of computational function: csuper

Interfacing function

  • SCI/modules/scicos_blocks/macros/IntegerOp/DLATCH.sci

Compiled Super Block content

Authors

Fady NASSIF - INRIA

<< DFLIPFLOP Integer palette EXTRACTBITS >>

Copyright (c) 2022-2024 (Dassault Systèmes)
Copyright (c) 2017-2022 (ESI Group)
Copyright (c) 2011-2017 (Scilab Enterprises)
Copyright (c) 1989-2012 (INRIA)
Copyright (c) 1989-2007 (ENPC)
with contributors
Last updated:
Wed Jan 26 16:25:14 CET 2011