Please note that the recommended version of Scilab is 2025.0.0. This page might be outdated.
See the recommended documentation of this function
VVsourceAC
Variable AC voltage source
Block Screenshot
Contents
Description
The variable voltage source block is a model for a controlled AC voltage source. This component provides a sinusoid voltage across its ports. The amplitude of the output voltage is governed by the explicit input and the frequency is defined by the user. The ohmic resistance of the block is zero.
Dialog box
Frequency (Hz)
Frequency of the output sinusoid voltage
Properties : Type 'vec' of size -1.
Default properties
Inputs :
Modelica variable name : 'p'
Implicit variable.
Modelica variable name : 'VA'
Explicit variable.
Outputs :
Modelica variable name : 'n'
Implicit variable.
Parameters :
Modelica parameter name : 'f'
Default value : 50
Is a state variable : no.
File name of the model : VVsourceAC
Interfacing function
SCI/modules/scicos_blocks/macros/Electrical/VVsourceAC.sci
Modelica model
SCI/modules/scicos_blocks/macros/Electrical/VVsourceAC.mo
Report an issue | ||
<< VsourceAC | Electrical_pal | Events_pal >> |