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See the recommended documentation of this function
DLATCH
D latch flip-flop
Block Screenshot
Contents
Palette
Description
This block copies its input state (D) on the output (Q) when the enable input (C) is high and in this configuration it appears as transparent. The !Q output is the logical negation of Q
When the enable input goes low, the output keeps its previous state and acts like a memory.
This block can be typically used in I/O ports.
The truth table of the block is the following ones:
No changes | ||||
Reset | ||||
Set |
where
X
means "indifferent" and
Qn-1
the previous state of
Qn
.
Data types
The block supports the following types :
Inputs:
D: scalar. Scilab's int8 data type only.
C: scalar. Scilab's real double.
A positive input is considered as logical 1, a negative or a null input as logical 0.
Ouputs: scalar. Scilab's int8 data type.
Default properties
always active: no
direct-feedthrough: yes
zero-crossing: no
mode: no
regular inputs:
- port 1 : size [1,1] / type 5
- port 2 : size [1,1] / type -1
regular outputs:
- port 1 : size [1,1] / type 5
- port 2 : size [1,1] / type 5
number/sizes of activation inputs: 0
number/sizes of activation outputs: 0
continuous-time state: no
discrete-time state: no
object discrete-time state: no
name of computational function: csuper
Example
The following figure shows a simple use case of the DLATCH block with its timing diagram.
Interfacing function
SCI/modules/scicos_blocks/macros/IntegerOp/DLATCH.sci
See also
- DFLIPFLOP — D flip-flop
- SRFLIPFLOP — SR flip-flop
- JKFLIPFLOP — JK flip-flop
Report an issue | ||
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